6.3 Buses
A bus component represents an execution platform component that can exchange control and data between memories, processors, and devices. This execution platform component represents a communication channel, typically hardware together with communication protocols.
Processors, devices, and memories can communicate by accessing a shared bus.  Such a shared bus can be located in the same system implementation as the execution platform components sharing it or higher in the system hierarchy.  Memory, processor, and device types, as well as the system type of systems they are contained in, can declare a need for access to a bus through a requires bus reference. 
Buses can be connected directly to other buses by one bus requiring access to another bus. Buses connected in such a way can have different bus classifier references.
Connections between software components that are bound to different processors transmit their information across buses whose protocol supports the respective connection category.
Legality Rules
Category
Type
Implementation
Bus
Features
    • requires bus access
Flow specifications: no
Properties: yes
Subcomponents:
    • None
Subprogram calls: no
Connections: no
Flows: no
Modes: yes
Properties: yes

A bus type can have requires bus access declarations and property associations.
A bus type must not contain any flow specifications.
A bus implementation must not contain any subcomponent declarations. 
A bus implementation can contain a modes subclause and property associations. 
A bus implementation must not contain a connections subclause, flows subclause, or subprogram calls subclause.
Standard Properties
-- Properties specifying bus transmission properties
Allowed_Connection_Protocol: list of enumeration
                                     (Data_Connection,
                                      Event_Connection)
Allowed_Access_Protocol: list of enumeration (Memory_Access,
                                              Device_Access)
Allowed_Message_Size: Size_Range
Transmission_Time: list of Time_Range
Propagation_Delay: Time_Range
-- Hardware description properties
Hardware_Description_Source_Text: inherit list of aadlstring
Hardware_Source_Language: Supported_Hardware_Source_Languages
-- Data movement related properties
Assign_Time: Time
Assign_Byte_Time: Time
Assign_Fixed_Time: Time
Semantics
A bus provides access between processors, memories, and devices.  This allows a processor to support execution of source text in the form of code and data loaded as binary images into memory components.  A bus allows a processor to access device hardware when executing device software. A bus may also support different port and subprogram connections between thread components bound to different processors.  The Allowed_Connection_Protocol property indicates which forms of access a particular bus supports.  The bus may constrain the size of messages communicated through data or event data connections.
A bus component provides access between processors, memories, and devices.  It is a shared component, for which access is required by each of the respective components.  A device is accessible from a processor if the two share a bus component and the Allowed_Connection_Protocol property value for that bus includes Device_Access.  A memory is accessible from a processor if the two share a bus component and the Allowed_Connection_Protocol property value for that bus includes Memory_Access.
Buses can be directly connected to other buses.  This is represented by one bus declaration specifying access to another bus in its requires subclause.
Bus components can have different property values under different operational modes.
Processing Requirements and Permissions
A method of implementation shall define how the final size of a transmission is determined for a specific connection.  Implementation choices and restrictions such as packetization and header and trailer information are not defined in this standard.
A method of implementation shall define the methods used for bus arbitration and scheduling.
Examples
bus VME
end VME;

memory Memory_Card
features
   Card_Connector : requires bus access VME;
end Memory_Card;

processor PowerPC
features
   Card_Connector : requires bus access VME;
end PowerPC;

processor implementation PowerPC.Linux
end PowerPC.Linux;

system Dual_Processor end Dual_Processor;

system implementation Dual_Processor.PowerPC
subcomponents
   System_Bus: bus VME;
   Left: processor PowerPC.Linux;
   Right: processor PowerPC.Linux;
   Shared_Memory: memory Memory_Card;

connections
   bus access System_Bus -> Left.Card_Connector;
   bus access System_Bus -> Right.Card_Connector;
   bus access System_Bus -> Shared_Memory.Card_Connector;
end Dual_Processor.PowerPC;